MODM7AE70 Additional SPI Ports

[mp5]

I'm looking to configure the UARTs as SPI ports, and the QSPI in single bit mode.

Is there any guide, or examples on how? I've ran through the DSPI, QSPI, and other examples as well as the source files and the API and just aren't finding how you would configure and utilize those. Can you just use DSPIInit with 1, 2, 3, etc in the arguments for SPI port? How do I set pin functions for these other ports to be SPI? I've worked with the SAM chips before and strung out multiple SPI's, but not sure how to do it with the NetBurner API, and I can't find examples and searching the API generally doesn't yield anything (for example, the online 3.0 docs don't even in the file list have dspi.h in the list, but it's in my NNDK install, and searching for dspi yields nothing, but then again searching for qspi yields nothing but there's tons of QSPI documentation on there...ah, if I wait a minute or so, QSPI comes up...but no dspi still).

I'm trying to test, but NBEclipse is getting me a ton of problems. Never hitting breakpoints, debugger hanging in the background, having to power cycle and restart things all the time. Random disconnects of things, and so on. I'm no NNDK 3.1, and that appears to be the newest....is there some other newer update, or anything else that cleans up these issues?

[mlara]

The DSPI driver for the MODM7AE70 currently only supports one SPI module. The SAME70 has multiple peripherals that can be configured for SPI, but we have only written a driver for one of the dedicated SPI peripherals on the SAME70 so far. There are other peripherals, such as the USARTs, that can be configured for SPI that we may write drivers for in the future.

Take a look at the Serial2SPI example in /nburn/examples/SPI/Serial2SPI for a basic example of how to use the DSPI peripheral on the MODM7AE70. This example also demonstrates how to configure the pins for DSPI.

We've recently added documentation to the DSPI driver, which will be included in the next 3.x release of the NNDK. I've attached our latest doxygen documentation where you can find the new DSPI driver documentation. I should mention, the attached documentation is based on the latest source that has not been released to the public yet. There may be minor differences in the attached documentation from the source you have. I don't believe there have been any changes to the DSPI driver since version 3.1 of the NNDK, though.

[mp5]

Yea, the DSPI for the one port works fine. I want to access the other ports.

So, basically the spec sheet for this thing says "4 SPI Ports", and talks about putting QSPI in single-bit mode to use it as a regular SPI port, etc but really there's only one that works? I kinda need 4...I bought it based upon the data and spec sheets NB provided and are currently hosting on their website as being correct.

Is it possible for us to return the 70+ of these things we bought? What else is on the datasheet, but not implemented?

[mp5]

So, based upon this lasted doxygen file, it looks like the QSPI for the SAME chip also isn't implemented?! Our fallback was to properly structure our data so that it would come out the 4 data lines on the QSPI port correctly to control 4 devices (higher performance since it transfers in parallel, but more complex to structure data correctly), but it's also looking like that isn't implemented?

At least it looks like the ADC works, hopefully all 16 ports? Example only shows 8, but I assume all 16 works....but I just got bit by assuming, so?

[TomNB]

Hello,

In response to your comments, we have added some additional comments to the datasheet. The datasheet is intended to be an electrical specification, so it does not mean there is a software driver for every peripheral. We are continually developing peripheral drivers, and our goal is to provide them for the most popular peripherals. Here is the additional text for SPI:

SPI Configurations
The SPI interfaces are available from the following:
• 1 dedicated SPI
• 1 Quad SPI that can be configured to run as a native SPI or QSPI
• 2 from USART0 and USART1 that can be configured as SPI

From a development library/example perspective, as of today, we provide the SPI driver that is the first bullet in the above list. We do not currently have drivers for the second two items, but it is something we are considering. That does not mean you cannot use the other SPI ports. However, it does mean that if you need them immediately, you would need to look to the SAME70 manual and implement the code. As a side note, we have found that writing a general SPI driver which covers all use cases is not as efficient as writing for a specific one. If you need all 4 SPI ports running in parallel as fast as possible, writing a bare metal interface to them to coordinate the data flow might be something to consider.

Regarding the ADC, yes, it definitely works. Actually, all the peripherals work; I think your question is more on what drivers we provide. The SOM has two headers with 50 pins each, so not every processor signal can be brought out to a header. Looking at the datasheet, I see we specify that up to 11 can be accessed (subject to how you multiplex the pins). There are two Analog to Digital converters than can be used in parallel, named AFE0 and AFE1. AFE0 also has a trigger input.

AFE0 inputs: 0, 1, 2, 5, 6, 8, 10, External trigger
AFE1 inputs: 0, 1, 3, 5

If we have 16 listed somewhere on our site or datasheet, please let me know, and I will have it corrected. If someone were to use our chip-based license solution, then all processor pins would be available. One additional note for our ColdFire customers: QSPI on ColdFire means Queued SPI. QSPI on ARM means Quad SPI, which has 4 data lines instead of 1.

Best regards,

Tom