NetBurner 3.1
dspi.h
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1 /*NB_REVISION*/
2 
3 /*NB_COPYRIGHT*/
4 
14 #ifndef _DMA_SPI_H_INC
15 #define _DMA_SPI_H_INC
16 
17 #include <nbrtos.h>
18 #include <basictypes.h>
19 #include <xdmac.h>
20 
21 #ifndef __cplusplus
22 #error DSPI driver is a C++ only library
23 #endif
24 
30 #define DSPI_OK ( 0 )
31 #define DSPI_BUSY ( 1 )
32 #define DSPI_ERROR ( 2 )
33 
35 
40 #define DEFAULT_DSPI_MODULE 0
41 #define DSPI_MODULE_COUNT 1
42 
44 
58 };
60 
61 // * spiDriverStruct
62 //*
63 // * This structure contains the major variables/configurations used for a DSPI transfer
64 // *
65 // * volatile uint8_t* pDSPIRxbuf/pDSPITxbuf -
66 // * These pointers are used to track the locations in memory where data will be
67 // * read or written to the peripheral
68 // *
69 // * uint8_t BitsPerQueue This is the number if bits per transfer, (value = 8 - 32)
70 // * uint32_t DSPI_SizeLeft This is the number if bytes left in the transfer
71 // * uint16_t Command_Mask This is a partial configuration for the queue's command reg
72 // * OS_SEM* DSPI_Sem This is a pointer to an external semaphore provided by DSPIStart()
73 // * uint8_t DSPI_INT_STATUS Status of the SPI device
74 // * uint32_t WordsToWrite Number of words to write to the command/TX Queues and Read from RX
75 // * uint32_t LastWordsToWrite the amount from the previous ISR
76 
77 typedef struct
78 {
79  csReturnType csReturnToInactive;
80  volatile uint8_t SPI_INT_STATUS;
81  volatile BOOL SPIfinished;
82  XdmaCh_t *txCh;
83  XdmaCh_t *rxCh;
84  dma_descview_1 last_TxDesc; // descriptor setting the 'lastxfer' transfer
85  dma_descview_1 last16_TxDesc; // descriptor setting the 'lastxfer' transfer - 16bit
86  uint32_t last_cr; // buffer to allow DMA to set the 'lastxfer' at completion
87  uint32_t lastTxISR;
88  uint32_t lastRxISR;
89  volatile uint8_t *rxBuf;
90  uint32_t rxLen;
91 } spiDriverStruct;
92 
93 uint8_t DSPIInit( uint8_t SPIModule, uint32_t Baudrate, uint8_t QueueBitSize, uint8_t CS,
94  uint8_t CSPol, uint8_t ClkPolarity, uint8_t ClkPhase, BOOL DoutHiz, uint8_t QCD, uint8_t DTL );
102 {
103 public:
104  static SPIModule *lastCtxs[DSPI_MODULE_COUNT];
105  static spiDriverStruct driverCtx[DSPI_MODULE_COUNT];
106 
107 private:
108  uint32_t m_moduleNum;
109  uint32_t m_regMR;
110  uint32_t m_regCSR;
111  OS_SEM *m_finishedSem;
112  uint32_t m_busSpeed;
113  uint8_t m_CSNum;
114 
115  void ReadyHW();
116  spiDriverStruct *getCtx() { return driverCtx + m_moduleNum; }
117  inline Spi * spi() { return SPI0 + m_moduleNum; }
118 
119 public:
120  volatile bool m_inProgress;
121 
122  // void dumpRegs();
123 
132  SPIModule( uint8_t SPIModule );
133 
151  SPIModule( uint8_t SPIModule, uint32_t baudRateInBps,
152  uint8_t transferSizeInBits = 8, uint8_t peripheralChipSelects = 0x00,
153  uint8_t chipSelectPolarity = 0x0F, uint8_t clockPolarity = 0,
154  uint8_t clockPhase = 1, BOOL doutHiz = TRUE,
155  uint8_t csToClockDelay = 0, uint8_t delayAfterTransfer = 0 );
156 
173  uint8_t Init( uint32_t baudRateInBps = 2000000,
174  uint8_t transferSizeInBits = 8, uint8_t peripheralChipSelects = 0x00,
175  uint8_t chipSelectPolarity = 0x0F, uint8_t clockPolarity = 0,
176  uint8_t clockPhase = 1, BOOL doutHiz = TRUE,
177  uint8_t csToClockDelay = 0, uint8_t delayAfterTransfer = 0 );
178 
188  uint32_t SetBusSpeed(uint32_t maxSpeed);
189 
209  uint8_t Start( uint8_t *transmitBufferPtr, volatile uint8_t *receiveBufferPtr,
210  uint32_t byteCount, int csReturnToInactive = DEASSERT_AFTER_LAST );
211 
221  inline uint8_t Tx( uint8_t *transmitBufferPtr, uint32_t byteCount,
222  int csReturnToInactive = DEASSERT_AFTER_LAST )
223  { return Start(transmitBufferPtr, NULL, byteCount, csReturnToInactive); }
224 
234  inline uint8_t Rx( uint8_t *receiveBufferPtr, uint32_t byteCount,
235  int csReturnToInactive = DEASSERT_AFTER_LAST )
236  { return Start(NULL, receiveBufferPtr, byteCount, csReturnToInactive); }
237 
238  // The SAME70 always uses DMA. These functions kept here for reference to other platforms
239  // bool EnableDMA(bool enableDMA = true);
240  // inline bool DisableDMA() { return EnableDMA(false); }
241 
251  bool RegisterSem( OS_SEM *finishedSem );
252 
258  inline bool ClrSem() { return RegisterSem(NULL); }
259 
265  inline OS_SEM * GetSem() { return m_finishedSem; }
266 
274  inline bool Done() { return !m_inProgress; }
275 
285  static BOOL Done( uint8_t SPIModule );
286 
295  inline uint32_t GetActualBaudrate() { return m_busSpeed; }
296 
304  inline bool SetCS( uint8_t CS )
305  {
306  OSLockObj lock;
307  if (m_inProgress) { return false; }
308  m_regMR = (m_regMR & ~SPI_MR_PCS_Msk);
309  switch(CS)
310  {
311  case 0:
312  m_regMR |= SPI_MR_PCS(0xE);
313  break;
314  case 1:
315  m_regMR |= SPI_MR_PCS(0xD);
316  break;
317  case 2:
318  m_regMR |= SPI_MR_PCS(0xB);
319  break;
320  case 3:
321  m_regMR |= SPI_MR_PCS(0x7);
322  break;
323  default:
324  m_regMR |= SPI_MR_PCS(0xF);
325  }
326 
327 
328  return true;
329  }
330 
331  // The ISR used by the DSPI driver. Internal use only (dspi.cpp).
332  friend void SPI_DMA_Isr(XdmaCh_t *dma, int module);
333 };
334 
335 
364 uint8_t DSPIInit( uint8_t SPIModule = DEFAULT_DSPI_MODULE, uint32_t baudRateInBps = 2000000,
365  uint8_t transferSizeInBits = 8, uint8_t peripheralChipSelects = 0x00,
366  uint8_t chipSelectPolarity = 0x0F, uint8_t clockPolarity = 0,
367  uint8_t clockPhase = 1, BOOL doutHiz = TRUE,
368  uint8_t csToClockDelay = 0, uint8_t delayAfterTransfer = 0 );
369 // Note: csToClockDelay: 0 default is 17/(system clock / 2), in keeping with interface to QSPI
370 
393 uint8_t DSPIStart( uint8_t SPIModule, puint8_t transmitBufferPtr, volatile uint8_t* receiveBufferPtr,
394  uint32_t byteCount, OS_SEM* finishedSem = NULL, uint8_t enableDMA = TRUE,
395  int csReturnToInactive = DEASSERT_AFTER_LAST );
396 
402 BOOL DSPIdone( uint8_t SPIModule = DEFAULT_DSPI_MODULE );
403 
404 // QSPI to DSPI Translation macros. Note that the 'Q' stands for Queued SPI
405 
434 inline uint8_t QSPIInit( uint32_t baudRateInBps = 2000000, uint8_t transferSizeInBits = 8,
435  uint8_t peripheralChipSelects = 0x0F, uint8_t chipSelectPolarity = 1,
436  uint8_t clockPolarity = 0, uint8_t clockPhase = 1, BOOL doutHiz = TRUE,
437  uint8_t csToClockDelay = 0, uint8_t delayAfterTransfer = 0 )
438 {
439  return DSPIInit( DEFAULT_DSPI_MODULE, baudRateInBps, transferSizeInBits,
440  peripheralChipSelects, chipSelectPolarity, clockPolarity, clockPhase,
441  doutHiz, csToClockDelay, delayAfterTransfer );
442 }
443 
465 inline uint8_t QSPIStart( puint8_t transmitBufferPtr, volatile uint8_t* receiveBufferPtr,
466  uint32_t byteCount, OS_SEM* finishedSem = NULL )
467 {
468  return DSPIStart( DEFAULT_DSPI_MODULE, transmitBufferPtr, receiveBufferPtr,
469  byteCount, finishedSem );
470 }
471 
479 inline BOOL QSPIdone( )
480 {
481  return DSPIdone( );
482 }
483 
484 #endif /* ----- #ifndef _DMA_SPI_H_INC ----- */
485 
486 /// @}
NetBurner Real-Time Operating System API.
SPI Peripheral Module Class.
Definition: dspi.h:101
Never deassert chip select.
Definition: dspi.h:55
uint8_t Start(uint8_t *transmitBufferPtr, volatile uint8_t *receiveBufferPtr, uint32_t byteCount, int csReturnToInactive=DEASSERT_AFTER_LAST)
Start a SPI transfer.
BOOL QSPIdone()
Compatibility function for previous drivers. Check SPI status.
Definition: dspi.h:479
bool ClrSem()
Clear a semaphore registration.
Definition: dspi.h:258
uint8_t Tx(uint8_t *transmitBufferPtr, uint32_t byteCount, int csReturnToInactive=DEASSERT_AFTER_LAST)
Convenience function for unidirectional transmit.
Definition: dspi.h:221
Semaphores are used to control access to shared resource critical section, or to communicate between ...
Definition: nbrtos.h:318
A simple wrapper class that helps use OS locks effectively.
Definition: nbrtos.h:1981
uint8_t Rx(uint8_t *receiveBufferPtr, uint32_t byteCount, int csReturnToInactive=DEASSERT_AFTER_LAST)
Convenience function for unidirectional receive.
Definition: dspi.h:234
OS_SEM * GetSem()
Obtain a pointer to the SPI finished semaphore.
Definition: dspi.h:265
uint8_t DSPIInit(uint8_t SPIModule, uint32_t Baudrate, uint8_t QueueBitSize, uint8_t CS, uint8_t CSPol, uint8_t ClkPolarity, uint8_t ClkPhase, BOOL DoutHiz, uint8_t QCD, uint8_t DTL)
Initialize a DSPI module.
uint8_t QSPIStart(puint8_t transmitBufferPtr, volatile uint8_t *receiveBufferPtr, uint32_t byteCount, OS_SEM *finishedSem=NULL)
Compatibility function for previous drivers. Start a SPI transfer.
Definition: dspi.h:465
Deassert chip select after last transfer.
Definition: dspi.h:56
csReturnType
Definition: dspi.h:54
#define DEFAULT_DSPI_MODULE
Default DSPI module.
Definition: dspi.h:40
uint8_t DSPIStart(uint8_t SPIModule, puint8_t transmitBufferPtr, volatile uint8_t *receiveBufferPtr, uint32_t byteCount, OS_SEM *finishedSem=NULL, uint8_t enableDMA=TRUE, int csReturnToInactive=DEASSERT_AFTER_LAST)
Start a DSPI transfer.
BOOL DSPIdone(uint8_t SPIModule=DEFAULT_DSPI_MODULE)
Check SPI status.
Deassert chip select After every transfer.
Definition: dspi.h:57
uint8_t QSPIInit(uint32_t baudRateInBps=2000000, uint8_t transferSizeInBits=8, uint8_t peripheralChipSelects=0x0F, uint8_t chipSelectPolarity=1, uint8_t clockPolarity=0, uint8_t clockPhase=1, BOOL doutHiz=TRUE, uint8_t csToClockDelay=0, uint8_t delayAfterTransfer=0)
Compatibility function for previous drivers. Initialize SPI module.
Definition: dspi.h:434
SPIModule(uint8_t SPIModule)
Create a SPI object.
uint32_t SetBusSpeed(uint32_t maxSpeed)
Set the SPI bus speed Will attempt to set the desired bus speed. It may be different based on the ava...
bool Done()
Function to check SPI status.
Definition: dspi.h:274
#define NULL
Definition: nm_bsp.h:76
uint32_t GetActualBaudrate()
Returns the active baud rate.
Definition: dspi.h:295
#define DSPI_MODULE_COUNT
Number of modules: 0, 1.
Definition: dspi.h:41
bool SetCS(uint8_t CS)
Set the chip select configuration for the SPI object&#39;s bus transactions.
Definition: dspi.h:304
uint8_t Init(uint32_t baudRateInBps=2000000, uint8_t transferSizeInBits=8, uint8_t peripheralChipSelects=0x00, uint8_t chipSelectPolarity=0x0F, uint8_t clockPolarity=0, uint8_t clockPhase=1, BOOL doutHiz=TRUE, uint8_t csToClockDelay=0, uint8_t delayAfterTransfer=0)
Initialize an existing SPI object.
bool RegisterSem(OS_SEM *finishedSem)
Register a semaphore for the SPI module.