54 #define CONF_WILC_BIG_ENDIAN (1) 60 #ifdef CONF_WILC_USE_3000_REV_A 61 #define COMPUTE_PMK_IN_HOST 63 #define CONCURRENT_INTERFACES 67 #define M2M_TIME_OUT_DELAY 10000 70 #define M2M_SUCCESS ((sint8)0) 71 #define M2M_ERR_SEND ((sint8)-1) 72 #define M2M_ERR_RCV ((sint8)-2) 73 #define M2M_ERR_MEM_ALLOC ((sint8)-3) 74 #define M2M_ERR_TIME_OUT ((sint8)-4) 75 #define M2M_ERR_INIT ((sint8)-5) 76 #define M2M_ERR_BUS_FAIL ((sint8)-6) 77 #define M2M_NOT_YET ((sint8)-7) 78 #define M2M_ERR_FIRMWARE ((sint8)-8) 79 #define M2M_SPI_FAIL ((sint8)-9) 80 #define M2M_ERR_FIRMWARE_bURN ((sint8)-10) 81 #define M2M_ACK ((sint8)-11) 82 #define M2M_ERR_FAIL ((sint8)-12) 83 #define M2M_ERR_FW_VER_MISMATCH ((sint8)-13) 84 #define M2M_ERR_SCAN_IN_PROGRESS ((sint8)-14) 85 #define M2M_ERR_BOOT ((sint8)-15) 87 #define M2M_FALSE_IRQ ((sint8)-50) // Added by NetBurner to resemble no more slave interrupts to service or a false interrupt was triggered 90 #define I2C_ERR_LARGE_ADDRESS 0xE1UL 91 #define I2C_ERR_TX_ABRT 0xE2UL 92 #define I2C_ERR_OVER_SIZE 0xE3UL 93 #define ERR_PREFIX_NMIS 0xE4UL 94 #define ERR_FIRMEWARE_EXCEED_SIZE 0xE5UL 96 #define PROGRAM_START 0x26961735UL 97 #define BOOT_SUCCESS 0x10add09eUL 98 #define BOOT_START 0x12345678UL 101 #define NBIT31 (0x80000000) 102 #define NBIT30 (0x40000000) 103 #define NBIT29 (0x20000000) 104 #define NBIT28 (0x10000000) 105 #define NBIT27 (0x08000000) 106 #define NBIT26 (0x04000000) 107 #define NBIT25 (0x02000000) 108 #define NBIT24 (0x01000000) 109 #define NBIT23 (0x00800000) 110 #define NBIT22 (0x00400000) 111 #define NBIT21 (0x00200000) 112 #define NBIT20 (0x00100000) 113 #define NBIT19 (0x00080000) 114 #define NBIT18 (0x00040000) 115 #define NBIT17 (0x00020000) 116 #define NBIT16 (0x00010000) 117 #define NBIT15 (0x00008000) 118 #define NBIT14 (0x00004000) 119 #define NBIT13 (0x00002000) 120 #define NBIT12 (0x00001000) 121 #define NBIT11 (0x00000800) 122 #define NBIT10 (0x00000400) 123 #define NBIT9 (0x00000200) 124 #define NBIT8 (0x00000100) 125 #define NBIT7 (0x00000080) 126 #define NBIT6 (0x00000040) 127 #define NBIT5 (0x00000020) 128 #define NBIT4 (0x00000010) 129 #define NBIT3 (0x00000008) 130 #define NBIT2 (0x00000004) 131 #define NBIT1 (0x00000002) 132 #define NBIT0 (0x00000001) 135 #define M2M_LOG_NONE 0 136 #define M2M_LOG_ERROR 1 137 #define M2M_LOG_INFO 2 138 #define M2M_LOG_REQ 3 139 #define M2M_LOG_DBG 4 141 #if (defined __APP_APS3_CORTUS__) 142 #define M2M_LOG_LEVEL M2M_LOG_ERROR 144 #define M2M_LOG_LEVEL M2M_LOG_DBG 176 #define M2M_INFO(...) 177 #define M2M_PRINT(...) 201 #define M2M_MAX(A,B) ((A) > (B) ? (A) : (B)) 202 #define M2M_SEL(x,m1,m2,m3) ((x>1)?((x>2)?(m3):(m2)):(m1)) 203 #define WORD_ALIGN(val) (((val) & 0x03) ? ((val) + 4 - ((val) & 0x03)) : (val)) 207 #define DATA_PKT_OFFSET 4 209 #ifndef CONF_WILC_BIG_ENDIAN 210 #define BYTE_0(word) ((uint8)(((word) >> 0 ) & 0x000000FFUL)) 211 #define BYTE_1(word) ((uint8)(((word) >> 8 ) & 0x000000FFUL)) 212 #define BYTE_2(word) ((uint8)(((word) >> 16) & 0x000000FFUL)) 213 #define BYTE_3(word) ((uint8)(((word) >> 24) & 0x000000FFUL)) 215 #define BYTE_0(word) ((uint8)(((word) >> 24) & 0x000000FFUL)) 216 #define BYTE_1(word) ((uint8)(((word) >> 16) & 0x000000FFUL)) 217 #define BYTE_2(word) ((uint8)(((word) >> 8 ) & 0x000000FFUL)) 218 #define BYTE_3(word) ((uint8)(((word) >> 0 ) & 0x000000FFUL)) 223 M2M_REQ_GRP_MAIN = 0, M2M_REQ_GRP_WIFI, M2M_REQ_GRP_HIF
229 M2M_REQ_DATA_PKT = NBIT7
234 NMI_API void m2m_memcpy(uint8* pDst,uint8* pSrc,uint32 sz);
235 NMI_API void m2m_memset(uint8* pBuf,uint8 val,uint32 sz);
237 NMI_API sint8 m2m_memcmp(uint8 *pu8Buff1,uint8 *pu8Buff2 ,uint32 u32Size);
238 NMI_API uint8 m2m_strncmp(uint8 *pcS1, uint8 *pcS2,
uint16 u16Len);
239 NMI_API uint8 * m2m_strstr(uint8 *pcIn, uint8 *pcStr);
240 NMI_API uint8 m2m_checksum(uint8* buf,
int sz);
#define NMI_API
Definition: nm_bsp.h:51
signed char sint8
Range of values between -128 to 127.
Definition: nm_bsp.h:123
This module contains NMC1500 BSP APIs declarations.
unsigned short uint16
Range of values between 0 to 65535.
Definition: ahdlc.cpp:46