5 #ifndef _QSPI_SHARED_H_ 6 #define _QSPI_SHARED_H_ 41 #define QSPI_CHIP_SELECT_0 (0x1) 42 #define QSPI_CHIP_SELECT_1 (0x2) 43 #define QSPI_CHIP_SELECT_2 (0x4) 44 #define QSPI_CHIP_SELECT_3 (0x8) 47 #define QSPI_SETTINGS_MAXIMUM (4) 50 #define QSPI_BLOCK_SIZE_IN_BYTES (16) 62 typedef enum _SpiTransferSize
64 TransferSize_16_bits = 0x0,
65 TransferSize_8_bits = 0x8
106 extern void QspiInitialize(BOOL isDriveStrengthHigh,
107 BOOL isHighImpedance,
108 BOOL isClockInactiveHigh,
109 BOOL isDataChangeOnLeading,
110 BOOL isChipSelectActiveLow,
111 uint8_t moduleChipSelects);
131 extern uint8_t QspiAllocate(
int spiSetting, uint16_t timeout);
149 extern void QspiRelease(
void);
175 extern int QspiCreateSetting(
int baudRateInMhz,
176 SpiTransferSize qspiTransferSize,
177 uint16_t delayFromCstoClockValid,
178 uint16_t delayBetweenTransfers,
199 extern void QspiChangeBaudRate(
int spiSettings,
int baudRateInMhz);
217 extern unsigned long QspiGetBaudRate(
void);
235 extern void QspiChangeSetting(
int spiSetting);
256 extern void QspiExchangeBytes(uint8_t *transmitBufferPtr, uint8_t *receiveBufferPtr, uint32_t byteCount,
OS_SEM *finishedSemPtr);
277 extern void QspiExchangeWords(uint16_t *transmitBufferPtr, uint16_t *receiveBufferPtr, uint32_t byteCount,
OS_SEM *finishedSemPtr);
295 extern void QspiUserChipSelects(uint8_t chipSelects);
313 extern void QspiSelectDevice(uint8_t chipSelects);
331 extern void QspiReleaseDevice(uint8_t chipSelects);
361 extern BOOL QspiSdioDataExchange(uint8_t *commandBufferPtr,
362 uint8_t *r5ResponsePtr,
364 uint8_t *dataBufferPtr,
366 uint32_t responseTimeout);
Semaphores are used to control access to shared resource critical section, or to communicate between ...
Definition: nbrtos.h:318