NetBurner 3.1
SPI - ARM SAME70 (DSPI)

Modules

 DspiChipSelectMode
 DSPI module chip select options.
 
 DspiModuleNumber
 DSPI Peripheral Module.
 
 DspiState
 DSPI Bus State.
 

Classes

class  SPIModule
 SPI Peripheral Module Class. More...
 

Functions

uint8_t DSPIInit (uint8_t SPIModule=DEFAULT_DSPI_MODULE, uint32_t baudRateInBps=2000000, uint8_t transferSizeInBits=8, uint8_t peripheralChipSelects=0x00, uint8_t chipSelectPolarity=0x0F, uint8_t clockPolarity=0, uint8_t clockPhase=1, BOOL doutHiz=TRUE, uint8_t csToClockDelay=0, uint8_t delayAfterTransfer=0)
 Initialize a DSPI module. More...
 
uint8_t DSPIStart (uint8_t SPIModule, puint8_t transmitBufferPtr, volatile uint8_t *receiveBufferPtr, uint32_t byteCount, OS_SEM *finishedSem=NULL, uint8_t enableDMA=TRUE, int csReturnToInactive=DEASSERT_AFTER_LAST)
 Start a DSPI transfer. More...
 
BOOL DSPIdone (uint8_t SPIModule=DEFAULT_DSPI_MODULE)
 Check SPI status. More...
 
uint8_t QSPIInit (uint32_t baudRateInBps=2000000, uint8_t transferSizeInBits=8, uint8_t peripheralChipSelects=0x0F, uint8_t chipSelectPolarity=1, uint8_t clockPolarity=0, uint8_t clockPhase=1, BOOL doutHiz=TRUE, uint8_t csToClockDelay=0, uint8_t delayAfterTransfer=0)
 Compatibility function for previous drivers. Initialize SPI module. More...
 
uint8_t QSPIStart (puint8_t transmitBufferPtr, volatile uint8_t *receiveBufferPtr, uint32_t byteCount, OS_SEM *finishedSem=NULL)
 Compatibility function for previous drivers. Start a SPI transfer. More...
 
BOOL QSPIdone ()
 Compatibility function for previous drivers. Check SPI status. More...
 

Detailed Description

The NetBurner ARM SAME70 DSPI Group

Function Documentation

◆ DSPIdone()

BOOL DSPIdone ( uint8_t  SPIModule = DEFAULT_DSPI_MODULE)

Check SPI status.

Returns
true if DSPI is finished, false if active

◆ DSPIInit()

uint8_t DSPIInit ( uint8_t  SPIModule = DEFAULT_DSPI_MODULE,
uint32_t  baudRateInBps = 2000000,
uint8_t  transferSizeInBits = 8,
uint8_t  peripheralChipSelects = 0x00,
uint8_t  chipSelectPolarity = 0x0F,
uint8_t  clockPolarity = 0,
uint8_t  clockPhase = 1,
BOOL  doutHiz = TRUE,
uint8_t  csToClockDelay = 0,
uint8_t  delayAfterTransfer = 0 
)

Initialize a DSPI module.

Notes:

  • The maximum baud rate is CPU_CLOCK / 3
  • Will initialize to the highest available baud rate that does not exceed the maximum
  • If configured for 8 bits per transfer then the data must be uint8_t aligned
  • If configured for greater than 8 bits per transfer then the data must be uint16_t aligned
  • If configured for greater than 16 bits per transfer then the data must be uint32_t aligned
  • Chip select is based on chipSelectPolarity
  • 0 data captured leading edge of DSPI_CLK, changed following edge.
  • 1 data changed leading edge of DSPI_CLK, captured following edge.
  • 0 default is as close to 1/2 DSPI_CLK without going under, keeping with the interface to SPI
  • 0 default is 17/(system clock / 2), in keeping with interface to QSPI
Parameters
SPIModuleSPI module number, 0 - 1
baudRateInBpsMaximum baud rate requested
transferSizeInBitsNumber of bits per transfer: 8, 16 or 32
peripheralChipSelectsSPI chip selects to use for transfer
chipSelectPolarity0 = inactive logic level low, 1 = high
clockPolarity0 = inactive logic level low, 1 = high
clockPhase0 = data captured leading edge clock, changed following edge. 1 = data changed leading edge clock, captured following edge.
doutHizData output high impedance between transfers
csToClockDelayDelay from chip select to valid clock (default is 0)
delayAfterTransferChip select mode DspiChipSelectMode
Returns
Current stat of DSPI bus DspiState

◆ DSPIStart()

uint8_t DSPIStart ( uint8_t  SPIModule,
puint8_t  transmitBufferPtr,
volatile uint8_t *  receiveBufferPtr,
uint32_t  byteCount,
OS_SEM finishedSem = NULL,
uint8_t  enableDMA = TRUE,
int  csReturnToInactive = DEASSERT_AFTER_LAST 
)

Start a DSPI transfer.

  • If configured for 8 bits per transfer then the data must be uint8_t aligned
  • If configured for > than 8 bits per transfer then the data must be uint16_t aligned
  • If configured for > than 16 bits per transfer then the data must be uint32_t aligned
  • If either RX or TX pointer is assigned 'null' then that communication direction will not occur.
  • If DSPI_Finished points to a semaphore, then the DSPI will POST to it when the transfer is complete.
  • The semaphore is optional, but it can increase efficiency.
Parameters
SPIModuleDSPI module to use, 0 - 1
transmitBufferPtrPointer to the buffer containing the data to transmit
receiveBufferPtrPointer to the buffer to store the received data
byteCountNumber of bytes to transmit
finishedSemOptional semaphore to post to when finished
enableDMAEnable DMA transfers
csReturnToInactiveChip select state
Returns
The current state of the SPI bus DspiState

◆ QSPIdone()

BOOL QSPIdone ( void  )
inline

Compatibility function for previous drivers. Check SPI status.

Can be called after QSPIStart(). Returns TRUE when transfer is complete. This is an alternative to using a semaphore.

Note that the 'Q' stands for Queued SPI

Returns
true if DSPI is finished, false if active

◆ QSPIInit()

uint8_t QSPIInit ( uint32_t  baudRateInBps = 2000000,
uint8_t  transferSizeInBits = 8,
uint8_t  peripheralChipSelects = 0x0F,
uint8_t  chipSelectPolarity = 1,
uint8_t  clockPolarity = 0,
uint8_t  clockPhase = 1,
BOOL  doutHiz = TRUE,
uint8_t  csToClockDelay = 0,
uint8_t  delayAfterTransfer = 0 
)
inline

Compatibility function for previous drivers. Initialize SPI module.

Initialize Queued Serial Peripheral Interface (QSPI)

Note that the 'Q' stands for Queued SPI

Will use the default SPI module, 0.

  • If configured for 8 bits per transfer then the data must be uint8_t aligned
  • If configured for > than 8 bits per transfer then the data must be uint16_t aligned
  • If configured for > than 16 bits per transfer then the data must be uint32_t aligned
  • If either RX or TX pointer is assigned 'null' then that communication direction will not occur.
  • If DSPI_Finished points to a semaphore, then the DSPI will POST to it when the transfer is complete.
  • The semaphore is optional, but it can increase efficiency.
Parameters
baudRateInBpsMaximum baud rate requested
transferSizeInBitsNumber of bits per transfer: 8, 16 or 32
peripheralChipSelectsSPI chip selects to use for transfer
chipSelectPolarity0 = inactive logic level low, 1 = high
clockPolarity0 = inactive logic level low, 1 = high
clockPhase0 = data captured leading edge clock, changed following edge. 1 = data changed leading edge clock, captured following edge.
doutHizData output high impedance between transfers
csToClockDelayDelay from chip select to valid clock (default is 0)
delayAfterTransferChip select mode DspiChipSelectMode
Returns
The current state of the SPI bus DspiState

◆ QSPIStart()

uint8_t QSPIStart ( puint8_t  transmitBufferPtr,
volatile uint8_t *  receiveBufferPtr,
uint32_t  byteCount,
OS_SEM finishedSem = NULL 
)
inline

Compatibility function for previous drivers. Start a SPI transfer.

Start QSPI Data Transfer.

Note that the 'Q' stands for Queued SPI

  • If configured for 8 bits per transfer then the data must be uint8_t aligned
  • If configured for > than 8 bits per transfer then the data must be uint16_t aligned
  • If configured for > than 16 bits per transfer then the data must be uint32_t aligned
  • If either RX or TX pointer is assigned 'null' then that communication direction will not occur.
  • If DSPI_Finished points to a semaphore, then the DSPI will POST to it when the transfer is complete.
  • The semaphore is optional, but it can increase efficiency.
Parameters
transmitBufferPtrPointer to the buffer containing the data to transmit
receiveBufferPtrPointer to the buffer to store the received data
byteCountNumber of bytes to transmit
finishedSemOptional semaphore to post to when finished
Returns
The current state of the SPI bus DspiState