NetBurner 3.0
i2cmaster.h
1 /*NB_REVISION*/
2 
3 /*NB_COPYRIGHT*/
4 
20 #ifndef _I2CMASTER_H
21 #define _I2CMASTER_H // if this include guard is changed, you must update the check in i2cmulti.h
22 
23 #ifdef _I2CMULTI_H
24 #error i2cmulti.h included previously. Only one of i2cmulti.h and i2cmaster.h may be included.
25 #else
26 #include <basictypes.h>
27 
28 #define I2C_MAX_BUF_SIZE (64)
29 
30 
36 #define I2C_RX_TX_TIMEOUT (5)
37 #define I2C_START_TIMEOUT (20)
38 
45 #define I2C_OK (0)
46 #define I2C_NEXT_WRITE_OK (1)
47 #define I2C_NEXT_READ_OK (2)
48 #define I2C_MASTER_OK (3)
49 #define I2C_TIMEOUT (4)
50 #define I2C_BUS_NOT_AVAIL (5)
51 #define I2C_NOT_READY (6)
52 #define I2C_LOST_ARB (7)
53 #define I2C_LOST_ARB_ADD (8)
54 #define I2C_NO_LINK_RX_ACK (9)
55 
64 #define I2CInit Master_I2CInit
65 #define I2CSendBuf Master_I2CSendBuf
66 #define I2CReadBuf Master_I2CReadBuf
67 #define I2CRestart Master_I2CRestart
68 #define I2CStart Master_I2CStart
69 #define I2CStop Master_I2CStop
70 #define I2CSend Master_I2CSend
71 #define I2CRead Master_I2CRead
72 #define I2CResetPeripheral Master_ResetPeripheral
73 
80 #define I2C_START_READ (1)
81 #define I2C_START_WRITE (0)
82 
84 // Set up different platform sim references to i2c struct
85 #if defined(MCF5441X)
86 #define I2C_SR sim2.i2c0.i2sr
87 #define I2C_CR sim2.i2c0.i2cr
88 #define I2C_DR sim2.i2c0.i2dr
89 #define I2C_FDR sim2.i2c0.i2fdr
90 #define I2C_ADR sim2.i2c0.i2adr
91 #elif defined(MCF5213)
92 #define I2C_SR sim.i2c.i2sr
93 #define I2C_CR sim.i2c.i2cr
94 #define I2C_DR sim.i2c.i2dr
95 #define I2C_FDR sim.i2c.i2fdr
96 #define I2C_ADR sim.i2c.i2ar
97 #elif defined(MCF5208)
98 #define I2C_SR sim.i2c.i2sr
99 #define I2C_CR sim.i2c.i2cr
100 #define I2C_DR sim.i2c.i2dr
101 #define I2C_FDR sim.i2c.i2fdr
102 #define I2C_ADR sim.i2c.i2adr
103 #else
104 #define I2C_SR sim.i2c.sr
105 #define I2C_CR sim.i2c.cr
106 #define I2C_DR sim.i2c.dr
107 #define I2C_FDR sim.i2c.fdr
108 #define I2C_ADR sim.i2c.adr
109 #endif
110 
138 #if (defined MCF5270 || defined MCF5234 || defined MCF5208)
139 void Master_I2CInit(uint8_t freqdiv = 0x16);
140 #elif (defined MCF5213 || defined MCF5282)
141 void Master_I2CInit(uint8_t freqdiv = 0x15);
142 #elif (defined MCF52234)
143 void Master_I2CInit(uint8_t freqdiv = 0x37);
144 #elif (defined MCF5441X)
145 void Master_I2CInit(uint8_t freqdiv = 0x3C);
146 #else
147 #error Master_I2CInit declaration missing for defined platform
148 #endif
149 
170 uint8_t Master_I2CSendBuf(uint8_t addr, puint8_t buf, int num, bool stop = true);
171 
192 uint8_t Master_I2CReadBuf(uint8_t addr, puint8_t buf, int num, bool stop = true);
193 
212 uint8_t Master_I2CRestart(uint8_t addr, bool Read_Not_Write, uint32_t ticks_to_wait = I2C_RX_TX_TIMEOUT);
213 
245 uint8_t Master_I2CStart(uint8_t addr, bool Read_Not_Write, uint32_t ticks_to_wait = I2C_START_TIMEOUT);
246 
259 uint8_t Master_I2CStop(uint32_t ticks_to_wait = I2C_RX_TX_TIMEOUT);
260 
273 uint8_t Master_I2CSend(uint8_t val, uint32_t ticks_to_wait = I2C_RX_TX_TIMEOUT);
274 
289 uint8_t Master_I2CRead(puint8_t val, uint32_t ticks_to_wait = I2C_RX_TX_TIMEOUT);
290 
293 /* reset the bus if it hangs */
294 void Master_ResetPeripheral();
295 
300 #define I2C_SR_BUSY (((0x20 & I2C_SR) == 0x20))
301 #define I2C_CR_SLAVE (((0x20 & I2C_CR) == 0x00))
302 #define I2C_SR_ARB_LOST (((0x10 & I2C_SR) == 0x10))
303 #define I2C_SR_ADRES_AS_SLAVE (((0x40 & I2C_SR) == 0x40))
304 #define I2C_SR_SLAVE_TX (((0x04 & I2C_SR) == 0x04))
305 #define I2C_CR_TX (((0x10 & I2C_CR) == 0x10))
306 #define I2C_SR_RX_ACK (((0x01 & I2C_SR) == 0x00))
307 #define I2C_CR_RX_ACK (((0x08 & I2C_CR) == 0x00))
308 #define I2C_SET_NO_ACK ((I2C_CR |= 0x08))
309 #define I2C_SET_ACK ((I2C_CR &= 0xF7))
310 #define I2C_SET_TX ((I2C_CR |= 0x10))
311 #define I2C_SET_RX ((I2C_CR &= 0xEF))
312 #define I2C_SET_REPEAT_START ((I2C_CR |= 0x04))
313 #define I2C_CLR_ARB_LOST ((I2C_SR &= 0xEF))
314 
316 #endif // #ifdef _I2CMULTI_H
317 #endif // #ifndef _I2CMASTER_H
318 
uint8_t Master_I2CStop(uint32_t ticks_to_wait=I2C_RX_TX_TIMEOUT)
Will issue a stop signal if the module has master control of the I2C bus and will release the bus if ...
#define I2C_RX_TX_TIMEOUT
Ticks allowed before timeout of a single byte transmission.
Definition: i2cmaster.h:36
uint8_t Master_I2CRead(puint8_t val, uint32_t ticks_to_wait=I2C_RX_TX_TIMEOUT)
This function reads a single byte in master mode from the I2C bus.
uint8_t Master_I2CSend(uint8_t val, uint32_t ticks_to_wait=I2C_RX_TX_TIMEOUT)
This function sends a single byte on the I2C bus.
#define I2C_START_TIMEOUT
Ticks allowed before timeout when attempting start on I2C bus.
Definition: i2cmaster.h:37
uint8_t Master_I2CReadBuf(uint8_t addr, puint8_t buf, int num, bool stop=true)
This function allows a buffer to be read from an address on the I2C bus in master mode without the ne...
uint8_t Master_I2CSendBuf(uint8_t addr, puint8_t buf, int num, bool stop=true)
This function sends a buffer to an address on the I2C bus in master mode without the need of a start ...
uint8_t Master_I2CRestart(uint8_t addr, bool Read_Not_Write, uint32_t ticks_to_wait=I2C_RX_TX_TIMEOUT)
Send a restart of communication with a slave device after finished communication on the bus...
void Master_I2CInit(uint8_t freqdiv=0x3C)
This is the I2C initialization routine.
uint8_t Master_I2CStart(uint8_t addr, bool Read_Not_Write, uint32_t ticks_to_wait=I2C_START_TIMEOUT)
Start of communication with a slave device.