Will the following method work to access 128k of byte wide SDRAM using the MOD5270 module ?
The problem being I only have the address lines A0-A15 coming out of the module and the SDRAM has A0-A16. However could I use two chip selects and a bit of LV logic to create an A16 signal for my SDRAM chip
The idea would be that CS1 is setup to be 0-64k and CS2 is the next 64-128k. Then use a two input AND gate to create a single CS for the SDRAM and use the CS1 signal as A16. This would make CS active and A16 low for the first 64k; CS active and A16 high for the top 64k accesses.
ie A16 = CS1
CS = CS1 & CS2
The problem is CS1 and CS2 are asseted after the address bus is setup by the CPU for rd/wr access. So will my pseudo A16 signal be setup to late for SDRAM access to work?