MOD54415 DSPI Slew Rate

[gavinm]

In the system code below (extract from MOD54415 dspi.cpp), I suspect there is a slight error? It’s concerned with setting the correct slew rate of the dspi3 signals.

DSPI3 slewrate is set by bits 3:2 of register Address: 0xEC09_406C (SRCR_UART)
So the bit AND highlighted in red in the code extract below should surely be “&= ~0x0C”, and not 0x0D? 0x0D will affect the UART0 slewrate settings (used for DSPI2 if the gpio pins are configured for DSPI)

It’s the same error in both the “baudSettings.baud > 20000000” and “baudSettings.baud > 4000000” sections of the “DSPIInit” function code. ie I think the error is repeated in 2 places.

Also - I don't think the slew rate settings are that great. You use Lowest (default) for DSPI clock of <4MHz, Low for clock of > 4MHz and High for clock of > 20MHz. With a DSPI clock of 3.9MHz if you look on a 'scope the data out is only just able to slew from 0 to 3.3v in half a bit time. So for improved reliability I think it would be wise to set the threshold for changing from Lowest to Low at less than 4MHz - say 2.5 or 3MHz. (SPI does however seem pretty resiliant and tolerant, I've had an SPI interface working to an A/D converter for 4 years set on the wrong clock polarity!)

Code from dspi.cpp
switch (SPIModule)
{
case 0:
// DSPI0 slewrate is bits [1:0], onewire is bits [5:4]
sim1.gpio.srcr_dspiow &= ~0x03;
sim1.gpio.srcr_dspiow |= 0x01;
break;
case 1:
// SDHC slewrate is bits [1:0], others unused
sim1.gpio.srcr_sdhc &= ~0x03;
sim1.gpio.srcr_sdhc |= 0x01;
break;
case 2:
// DSPI2 pins are UART0, UART0 slewrate is bits [1:0]
sim1.gpio.srcr_uart &= ~0x03;
sim1.gpio.srcr_uart |= 0x01;
break;
case 3:
// DSPI3 pins are UART1, UART1 slewrate is bits [3:2]
sim1.gpio.srcr_uart &= ~0x0D;
sim1.gpio.srcr_uart |= 0x04;
break;
}

[dciliske]

Indeed. You are absolutely correct. Fix added.

-Dan