Nano carrier board documentation

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mwood
Posts: 6
Joined: Mon Feb 01, 2010 1:13 pm

Nano carrier board documentation

Post by mwood »

I can't seem to find any documentation that describes the P2 and P3 connectors on the Nano Carrier Board. Could someone please point me in the right direction?
seulater
Posts: 445
Joined: Fri Apr 25, 2008 5:26 am

Re: Nano carrier board documentation

Post by seulater »

I dont know if i am allowed to send you the whole kit skiz, so i am just going to show P2 & P3.
Submit a ticket and i am sure they will send you it.
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mwood
Posts: 6
Joined: Mon Feb 01, 2010 1:13 pm

Re: Nano carrier board documentation

Post by mwood »

Thanks.
rnixon
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Joined: Thu Apr 24, 2008 3:59 pm

Re: Nano carrier board documentation

Post by rnixon »

Do you see a sch in the \nburn\docs\platform directory?
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dciliske
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Re: Nano carrier board documentation

Post by dciliske »

You'll note that on the current revision of the carrier board, the headers are odd/even swapped relative to the numbering on the actual Nano connector (as shown in seulater's post). This is planned to change in the next revision of the carrier board (most likely simply just a change in the silkscreen).

I hope that's not what prompted this question... :/
Dan Ciliske
Project Engineer
Netburner, Inc
mwood
Posts: 6
Joined: Mon Feb 01, 2010 1:13 pm

Re: Nano carrier board documentation

Post by mwood »

Thanks for the input. It turns out that the last time I updated the IDE the schematic didn't show up in the docs/platform directory so I didn't know it was supposed to be there. I download and reinstalled the latest IDE and the schematic is present. All is well.
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