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	// Before I begin configuring the edge ports, I'm going to disable the interrupts in epier
	sim2.eport.epier &= 0x31; // Just disable IRQ1, 2, 3, 6, and 7
	// I'm also going to clear/acknowledge any pending ints
	sim2.eport.epfr = 0xCE; // Clear ints 1,2,3,6,7
	// 30 JAN 2018 EDIT - Adding manual pin control for IRQ1, 2, and 3, IRQ6,7 set to output.
	// I will program IRQ7 and 6 for GPIO, Outputs, off. IRQ1, 2, and 3 to IRQ.
	// In general, 11 = primary, 10 Alt 1, 01 Alt 2, 00 GPIO in par_ registers
	sim1.gpio.par_irq0h &= 0x0F; // Keep IRQ 4 just in case, IRQ7 GPIO
	sim1.gpio.par_irq0h |= 0x03; // Make IRQ 1 the edge port pin
	sim1.gpio.par_irq0l = 0x3C; // Make IRQ2, 3 INTS, IRQ6 GPIO
	// Set IRQ6 and 7 as GPIO outputs, and turn off
	sim1.gpio.pddr_c |= 0x60; // That makes them outputs Recall: IRQ6<->PC.5 ; IRQ7<->PC.6
	// Now to make sure the IRQ123 and inputs, while not changing IRQ4
	sim1.gpio.pddr_c &= 0xF1; // Clear bits 1, 2, and 3 to make inputs. Just in case
	// Keep in mind, as far as PORT ID is concerned, IRQ6 is PORTC.5, IRQ7 is PORTC.6
	sim1.gpio.pclrr_c = 0x6E; // That also turns off IRQ1, 2, and 3, but I don't know that it does anything
	vector_base.table[65] = (long)&FireDoneDummy; // Just so  it doesn't dump, set up some dummy 65=IRQ1
	vector_base.table[66] = (long)&DataDoneDummy; // interrupt handlers 66 = IRQ2
	vector_base.table[67] = (long)&SyncEncDummy; // 67 = IRQ3

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	// Clear any pending interrupts
	sim2.eport.epfr = 0x0E;
	// Set direction as input, this time in EPDDR
	sim2.eport.epddr &= 0xF1; // 1,2,3 in
	sim2.eport.epddr |= 0xC0; // 6,7 out
	sim2.eport.epdr &= 0x3F; // Clear 6,7
	// Set Rising Edge Trigger
	sim2.eport.eppar &= 0xFF03; // Clear old setting
	sim2.eport.eppar |= 0x0054; // All 3 to pos edge trig
	// Clear any pending interrupts
	sim2.eport.epfr = 0x0E;
	// Set the levels like the examples
	sim2.intc[0].icrn[1] = 0x01;
	sim2.intc[0].icrn[2] = 0x02;
	sim2.intc[0].icrn[3] = 0x03;
	// Mask off the Data Done IRQ2, as software will poll the flag
	sim2.intc[0].simr = 0x04; // Mask 2
	sim2.intc[0].cimr = 0x02; // Unmask 1
	sim2.intc[0].cimr = 0x08; // Unmask 3

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INTERRUPT( FireDoneDummy, 0x2100)
{
	printf("f");
	sim2.eport.epfr = 0x02; // Clear IRQ 1
	return;
}
INTERRUPT( DataDoneDummy, 0x2200 )
{
	// Clear the register
	printf("d");
	sim2.eport.epfr = 0x04; // Clear IRQ 2
	return;
}
INTERRUPT( SyncEncDummy, 0x2300 )
{
	printf("e");
	sim2.eport.epfr = 0x08; // Clear IRQ3
	return;
}

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SetPinIrq( 26, 1, &SyncEncDummy);  // IRQ 3
SetPinIrq( 43, 1, &DataDoneDummy);  // IRQ 2
SetPinIrq( 45, 1, &FireDoneDummy);  // IRQ 1
J2[47].function( PINJ2_47_GPIO );
J2[47] = 0;