Nano slowest I2C setting

[chourizo]

I am having some issues while communicating with a small 8-bit micro that is set to work via I2C at 50KHz. At the nano, following the documentation to do the I2C Init:

Code: Select all

For MOD54415
// Internal bus clock which = (250MHZ (sys clock)/2) / freqdiv to give max baud rate of the master mode
// i2c bus. Values for freqdiv are found in the i2fdr section of the MOD54415 user manual.

The slowest setting is 0x3F, which is 2048, and that gives me 61KHz.

Is that really the slowest I can go or did I misunderstood something?
Thanks!

[mbrown]

The table is a little deceiving and doesn't exactly count from lowest to highest. You'll notice it goes higher from 0x00 to 0x1F then resets again and 0x20 up to 0x3F. The values for 0x1C, 0x1D, 0x1E, and 0x1F are 2304, 2560, 3072, and 3840. I think 2560 is your best bet as 125MHz/2560 = 48.8kHz.

Give it a shot and let us know if it works out.

[chourizo]

You are right, I didn't realize that the divider starts again at 0x20.

I tried 2560 and it worked. Thanks for your help!