FPGA Blade for PK70

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pbreed
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FPGA Blade for PK70

Post by pbreed »

I've just finished a prototype FPGA blade board for the PK70.
It has a Xilinx XC3S500E Spartan 3E FPGA on it and a DB-62 pin HD connector (The same size as a DB37)

I have simple verilog code running on it that turns it into 48 bits of bit by bit programmable direction GPIO with full register read back.
(This uses a whole 2% of the FPGA slices )

I also have notes on how to take the Xilinx bit file and have the Netburner load that code into the FPGA on startup.
This allows you to link the FPGA image to the netburner application so Autoupdate loads both together.

I just have no feel for if this should turn into a product or an app note?
Anyone have any interest in such an FPGA blade board? (Estimated cost in single would be ~$79.00)


Another possible product option would be to take standard MOD5270 Netburner and add an FPGA between the pocessor and all the module pins.
That way one could dynamically determine if you wanted 80 pins of GPIO, or a 32bit external data bus etc... 12 uarts, 32 servo drives, six phase syncronous PWM etc...
Such a product would be sold at lower volumes than the MOD5270 need more layers and and would need larger FLASH so it would probably be $50.00 to $70 more than the
normal MOD5270, but it would be really flexible. Any interest in a product like that?



Paul
Ridgeglider
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Re: FPGA Blade for PK70

Post by Ridgeglider »

Paul:
I'd be most interested in having this functionality built as a stackable module that could plug onto the J1 connector of any of the modules as a memory mapped device. That way, you'd have all of the processors' built-in IO pin functionality plus whatever the FPGA would support. It would be sort of like adding an eTPU module for the rest of the core modules. If it worked off the J1 connector, it should work for all of your networked modules and be a wonderful, generic expansion option. In my opinion, it would be too bad to limit this capability to only the PK blades or a special embodiement of the 5270 alone. I think your market for the product might be bigger with this approach.
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tony
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Re: FPGA Blade for PK70

Post by tony »

Paul,

I have been waiting for a long time (~2 years) since Netburner started talking about FPGA boards. I am definitely interested in getting one of these boards. Please provide details on how to proceed.
Could you post the info you have available in the mean time so that we can get up to speed on what you have developed.

Cheers,
Tony
bbracken
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Re: FPGA Blade for PK70

Post by bbracken »

Paul,

Good job. Don't have any immediate demand for one right now. Could have used one 4 years ago.

bb
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pbreed
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Re: FPGA Blade for PK70

Post by pbreed »

The problem with a stackable module is that there are processor pins that would be useful to the FPGA that are not brought out on the existing 100 pins.
My thought was to add the FPGA to the core board and attach ALL the processor pins to it then bring the 100 pin headers out through the FPGA.
That way all processor functionality is available through the FPGA and all the processor pins are available to the FPGA.
It also proven ove3r and over again that a multiple board solution is almost alays too expensive.

the only dedicated pins would bre Uart 0 Rx,Tx power and ground. All the other would be assignable.
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Chris Ruff
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Re: FPGA Blade for PK70

Post by Chris Ruff »

Paul

I have been putting off Xilinx update capability from the NB code for a long time now. I always use CPLD parts and I would be very interested in the technology you have working to program the Xilinx from the code. I don't care how you do it, app note, board, or new 5270 product, I would like to get on your shoulders and start updating my Xilinx designs from the code.

Chris
Real Programmers don't comment their code. If it was hard to write, it should be hard to understand
bbracken
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Re: FPGA Blade for PK70

Post by bbracken »

Chris,

Pretty straight forward to do. I wrote a little C program that takes the binary Xilinx file and converts it to a .h file which is then compiled into the project. I seem to recall you need 4 GPIO lines (CCLK, PROG, INIT, DOUT). You just bit bang it. I was using an XCS400 which was about 50% full and it took about 5 to 10 seconds? Could have been faster if it was "all" in assembly language.

bb
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Chris Ruff
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Re: FPGA Blade for PK70

Post by Chris Ruff »

Paul

Yes, I agree that the concept is simple. I haven't taken the time to work out the line wiggling...and You have it working!

Chris
Real Programmers don't comment their code. If it was hard to write, it should be hard to understand
ahbushnell
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Re: FPGA Blade for PK70

Post by ahbushnell »

I think a blade on the same board with a processor is a great idea.

Andy
kstsauveur
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Re: FPGA Blade for PK70

Post by kstsauveur »

I definitely think this is a good idea for a product. We use CPLD/FPGAs for multiple projects and would love to have more reasons to keep using Netburner products.

I am working on a project right now where we are replacing a PC-104 cpu board with a MOD5234 Netburner. In my solution I used the ftpserver along with the EEFS filesystem to store the binary to program an FPGA in flash memory. We are then using four GPIO pins to "bit-bang" the FPGA programming on program load and then we have a CPLD to handshake between the ~74MHz MOD5234 address/data bus and the ~66Mhz programmed FPGA bus (this had to stay the same for contract/legacy reasons, I would have like to simply updated the vhdl and eliminate the need for the CPLD but it was not my decision in the end)...

Anyway, love the idea.
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