MOD54415 External Bus Issue

cfavreau · Post by **cfavreau** » Thu Aug 16, 2012 2:04 pm

I am having a bit of difficulty setting up the external bus on my Mod54415. Here is my code:

sim2.cs[0].csar = 0xC0000000;
sim2.cs[0].cscr = 0x00000280;
sim2.cs[0].csmr = 0x00000001;

The main issue that when I write anything into these registers the ethernet stops. I have tried CS 1 to 4 and all have the same result when I set the valid bit in the CSMR. CS 1 does it when I write something in the CSAR or CSCR registers.

So my guess is that the bus is being used by some components and I am not sure what since I cannot find any documentation for what is on the bus or a schematic. I tried looking at the Technical Documents page for the modules however there are no technical documents on the Mod5441X modules. I did find the "Mod5282 Hardware Design Notes" and some examples elsewhere in this forum for the older modules however nothing for this one.

Any help would be greatly appreciated.
Thanks, Chris F.

More detailed explanation of my settings:

Code: Select all

// See Page 20-7 - MF5441X Reference Manual
// Setup the FlexBus mapping the sonar Topside FPGA into our address space
sim2.cs[0].csar = SONARHARDWARE_BASEADDR;
// Set the Control Register
// Secondary Wait States = 0, Sec. Wait State Enable = 0
// Enable Extended Start XFer = 0
// Address Setup = 0 (don't wait to assert CS)
// Read Address Hold or Deselect Time = 00 (1 cycle)
// Write Address Hold or Deselect Time = 00 (1 cycle)
// Wait States = 2 (Bits 15-10)
// Byte Lane Shift = 0
// Auto Ack Enable = 0
// Port Size = 16 bit = 1X (10 ?)
// Byte Enable Mode = 0
// Burst Write Enable = 0 (for now ... how do we use this?)
// Reserved = 0
sim2.cs[0].cscr = 0x00000280;
// Set the Mask Register
// 16 Bit Address Only = 0000 | Write Protect = 0 | Valid Bit = 1
sim2.cs[0].csmr = 0x00000001;