While debugging my Spurious Interrupt I noticed that the library source for SetIntc();
sim.intc[intc].imrh |= mask;
should be bracketed by UCOS_ENTER_CRITICAL(); and UCOS_EXIT_CRITICAL(); to prevent the read-modify-write being interrupted by an ISR or higher priority task which could write to the same mask register. This would mean that the write made by the ISR or higher priority task will be "reversed" by the final write of the read-modify-write.
this means that
sim.intc[intc].imrh &= ~mask;
should also be bracketed
In general any read-modify-write should be protected against interrupt by some other task wich writes to the same register.